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sn54hc14 , SN74HC14 scls085h ? december 1982 ? revised september 2015 snx4hc14 hex schmitt-trigger inverters 1 features 3 description these schmitt-trigger devices contain six 1 ? wide operating voltage range of 2 v to 6 v independent inverters. they perform the boolean ? outputs can drive up to 10 lsttl loads function y = a in positive logic. ? low power consumption, 20- a max i cc device information (1) ? typical t pd = 11 ns part number package body size (nom) ? 4-ma output drive at 5 v cdip (14) 7.62 mm x 19.94 mm ? low input current of 1 a max cfp (14) 7.11 mm x 9.11 mm ? on products compliant to mil-prf-38535, lccc (20) 8.89 mm x 8.89 mm all parameters are tested unless otherwise soic (14) 6.00 mm x 8.65 mm noted. on all other products, production snx4hc14 ssop (14) 367.00 mm x 367.00 mm processing does not necessarily include testing of all parameters. pdip (14) 7.94 mm x 10.35 mm so (14) 7.80 mm x 10.20 mm 2 applications tssop (14) 6.40 mm x 5.00 mm ? microwave oven (1) for all available packages, see the orderable addendum at the end of the data sheet. ? mice ? printers ? ac inverter drives ? ups ? ac servo drives ? other motor drives logic diagram (positive logic) 1 an important notice at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications, intellectual property matters and other important disclaimers. production data. a y productfolder sample &buy technical documents tools & software support &community
sn54hc14 , SN74HC14 scls085h ? december 1982 ? revised september 2015 www.ti.com table of contents 9.2 functional block diagram ......................................... 9 1 features .................................................................. 1 9.3 feature description ................................................... 9 2 applications ........................................................... 1 9.4 device functional modes .......................................... 9 3 description ............................................................. 1 10 application and implementation ........................ 10 4 revision history ..................................................... 2 10.1 application information .......................................... 10 5 device comparison table ..................................... 3 10.2 typical application ................................................ 10 6 pin configuration and functions ......................... 4 11 power supply recommendations ..................... 11 7 specifications ......................................................... 5 12 layout ................................................................... 12 7.1 absolute maximum ratings ...................................... 5 12.1 layout guidelines ................................................. 12 7.2 esd ratings .............................................................. 5 12.2 layout example .................................................... 12 7.3 recommended operating conditions ....................... 5 13 device and documentation support ................. 13 7.4 thermal information .................................................. 5 13.1 documentation support ........................................ 13 7.5 electrical characteristics ........................................... 6 13.2 related links ........................................................ 13 7.6 switching characteristics .......................................... 6 13.3 community resources .......................................... 13 7.7 operating characteristics .......................................... 6 13.4 trademarks ........................................................... 13 7.8 typical characteristics .............................................. 7 13.5 electrostatic discharge caution ............................ 13 8 parameter measurement information .................. 8 13.6 glossary ................................................................ 13 9 detailed description .............................................. 9 14 mechanical, packaging, and orderable 9.1 overview ................................................................... 9 information ........................................................... 13 4 revision history note: page numbers for previous revisions may differ from page numbers in the current version. changes from revision g (january 2014) to revision h page ? added pin configuration and functions section, esd ratings table, feature description section, device functional modes , application and implementation section, power supply recommendations section, layout section, device and documentation support section, and mechanical, packaging, and orderable information section .............................. 1 ? added military disclaimer to features list. ............................................................................................................................. 1 ? added applications ................................................................................................................................................................. 1 changes from revision f (december 2010) to revision g page ? updated document to new ti data sheet format - no specification changes. ........................................................................ 1 2 submit documentation feedback copyright ? 1982 ? 2015, texas instruments incorporated product folder links: sn54hc14 SN74HC14
sn54hc14 , SN74HC14 www.ti.com scls085h ? december 1982 ? revised september 2015 5 device comparison table part number package body size (nom) sn54hc14j cdip (14) 7.62 mm x 19.94 mm snj54hc14w cfp (14) 7.11 mm x 9.11 mm snj54hc14fk lccc (20) 8.89 mm x 8.89 mm SN74HC14dr soic (14) 6.00 mm x 8.65 mm SN74HC14dbr ssop (14) 367.00 mm x 367.00 mm SN74HC14n pdip (14) 7.94 mm x 10.35 mm SN74HC14nsr so (14) 7.80 mm x 10.20 mm SN74HC14pw tssop (14) 6.40 mm x 5.00 mm copyright ? 1982 ? 2015, texas instruments incorporated submit documentation feedback 3 product folder links: sn54hc14 SN74HC14
sn54hc14 , SN74HC14 scls085h ? december 1982 ? revised september 2015 www.ti.com 6 pin configuration and functions j, w, d, db, n, ns, or pw package fk package 14-pin cdip, cfp, soic, ssop, so, or tssop 20-pin lccc top view top view pin functions pin cdip, cfp, i/o description name soic, ssop, lccc so, tssop 1a 1 2 i channel 1 input 1y 2 3 o channel 1 output 2a 3 4 i channel 2 input 2y 4 6 o channel 2 output 3a 5 8 i channel 3 input 3y 6 9 o channel 3 output gnd 7 10 ? ground 4y 8 12 o channel 4 output 4a 9 13 i channel 4 input 5y 10 14 o channel 5 output 5a 11 16 i channel 5 input 6y 12 18 o channel 6 output 6a 13 19 i channel 6 input v cc 14 20 ? power supply 1 5 7 nc (1) ? ? no internal connection 11 15 17 (1) nc ? no internal connection 4 submit documentation feedback copyright ? 1982 ? 2015, texas instruments incorporated product folder links: sn54hc14 SN74HC14 3 2 1 20 19 9 10 11 12 13 45 6 7 8 1817 16 15 14 6y nc5a nc 5y 2a nc 2y nc 3a 1y1a nc 4y4a v6a 3y gnd nc cc 12 3 4 5 6 7 1413 12 11 10 98 1a 1y2a 2y 3a 3y gnd v cc 6a6y 5a 5y 4a 4y
sn54hc14 , SN74HC14 www.ti.com scls085h ? december 1982 ? revised september 2015 7 specifications 7.1 absolute maximum ratings over operating free-air temperature range (unless otherwise noted) (1) min max unit v cc supply voltage ? 0.5 7 v i ik input clamp current (2) v i < 0 or v i > v cc 20 ma i ok output clamp current (2) v o < 0 20 ma i o continuous output current v o = 0 to v cc 25 ma continuous current through v cc or gnd 50 ma t j junction temperature 150 c t stg storage temperature ? 65 150 (1) stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. these are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under recommended operating conditions is not implied. exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. (2) the input and output voltage ratings may be exceeded if the input and output current ratings are observed. 7.2 esd ratings value unit human body model (hbm), per ansi/esda/jedec js-001 (1) 2000 v (esd) electrostatic discharge v charged-device model (cdm), per jedec specification jesd22- 1500 c101 (2) (1) jedec document jep155 states that 500-v hbm allows safe manufacturing with a standard esd control process. (2) jedec document jep157 states that 250-v cdm allows safe manufacturing with a standard esd control process. 7.3 recommended operating conditions see (1) . sn54hc14 SN74HC14 unit min nom max min nom max v cc supply voltage 2 5 6 2 5 6 v v i input voltage 0 v cc 0 v cc v v o output voltage 0 v cc 0 v cc v t a operating free-air temperature ? 55 125 ? 40 85 c (1) all unused inputs of the device must be held at v cc or gnd to ensure proper device operation. refer to the ti application report, implications of slow or floating cmos inputs , scba004 . 7.4 thermal information snx4hc14 pw thermal metric (1) d (soic) db (ssop) n (pdip) ns (so) unit (tssop) 14 pins 14 pins 14 pins 14 pins 14 pins r ja junction-to-ambient thermal resistance 86 96 80 76 113 c/w (1) for more information about traditional and new thermal metrics, see the semiconductor and ic package thermal metrics application report, spra953 . copyright ? 1982 ? 2015, texas instruments incorporated submit documentation feedback 5 product folder links: sn54hc14 SN74HC14
sn54hc14 , SN74HC14 scls085h ? december 1982 ? revised september 2015 www.ti.com 7.5 electrical characteristics over operating free-air temperature range (unless otherwise noted) t a = 25 c sn54hc14 SN74HC14 parameter test conditions v cc unit min typ max min max min max 2 v 0.7 1.2 1.5 0.7 1.5 0.7 1.5 v t+ 4.5 v 1.55 2.5 3.15 1.55 3.15 1.55 3.15 v 6 v 2.1 3.3 4.2 2.1 4.2 2.1 4.2 2 v 0.3 0.6 1 0.3 1 0.3 1 v t ? 4.5 v 0.9 1.6 2.45 0.9 2.45 0.9 2.45 v 6 v 1.2 2 3.2 1.2 3.2 1.2 3.2 2 v 0.2 0.6 1.2 0.2 1.2 0.2 1.2 v t+ ? v t ? 4.5 v 0.4 0.9 2.1 0.4 2.1 0.4 2.1 v 6 v 0.5 1.3 2.5 0.5 2.5 0.5 2.5 2 v 1.9 1.998 1.9 1.9 i oh = ? 20 a 4.5 v 4.4 4.499 4.4 4.4 v oh v i = v ih or v il 6 v 5.9 5.999 5.9 5.9 v i oh = ? 4 ma 4.5 v 3.98 4.3 3.7 3.84 i oh = ? 5.2 ma 6 v 5.48 5.8 5.2 5.34 2 v 0.002 0.1 0.1 0.1 i ol = 20 a 4.5 v 0.001 0.1 0.1 0.1 v ol v i = v ih or v il 6 v 0.001 0.1 0.1 0.1 v i ol = 4 ma 4.5 v 0.17 0.26 0.4 0.33 i ol = 5.2 ma 6 v 0.15 0.26 0.4 0.33 i i v i = v cc or 0 6 v 0.1 100 1000 1000 na i cc v i = v cc or 0, i o = 0 6 v 2 40 20 a c i 2 v to 6 v 3 10 10 10 pf 7.6 switching characteristics over operating free-air temperature range, c l = 50 pf (unless otherwise noted) (see figure 3 ) t a = 25 c sn54hc08 sn74hc08 from to parameter v cc unit (input) (output) min typ max min max min max 2 v 55 125 190 155 t pd a y 4.5 v 12 25 38 31 ns 6 v 11 21 22 26 2 v 38 75 110 95 t t y 4.5 v 8 15 22 19 ns 6 v 6 13 19 16 7.7 operating characteristics t a = 25 c parameter test conditions typ unit c pd power dissipation capacitance per inverter no load 20 pf 6 submit documentation feedback copyright ? 1982 ? 2015, texas instruments incorporated product folder links: sn54hc14 SN74HC14
sn54hc14 , SN74HC14 www.ti.com scls085h ? december 1982 ? revised september 2015 7.8 typical characteristics figure 1. tpd vs temperature at 4.5 v, 25 c figure 2. tpd vs v cc at 25 c copyright ? 1982 ? 2015, texas instruments incorporated submit documentation feedback 7 product folder links: sn54hc14 SN74HC14 temperature tpd (ns) -100 -50 0 50 100 150 11.5 12 12.5 13 13.5 14 14.5 d001 v cc tpd (ns) 0 2 4 6 8 0 10 20 30 40 50 60 70 d002
sn54hc14 , SN74HC14 scls085h ? december 1982 ? revised september 2015 www.ti.com 8 parameter measurement information figure 3. load circuit and voltage waveforms 8 submit documentation feedback copyright ? 1982 ? 2015, texas instruments incorporated product folder links: sn54hc14 SN74HC14 from output under test c = 50 pf (see note a) l load circuit test point voltage waveforms input rise and fall times input 90% 90% 50% 50% 10% 10% t f t r 0 v v cc voltage waveforms propagation delay and output transition times t plh t plh t phl t phl input in-phase output out-of-phase output 90% 90% 90% 50% 10% 10% 10% 50% 50% 50% 50% t f t f t r 90% 10% 50% t r v cc v ol v oh v oh 0 v v ol
sn54hc14 , SN74HC14 www.ti.com scls085h ? december 1982 ? revised september 2015 9 detailed description 9.1 overview these schmitt-trigger devices contain six independent inverters. they perform the boolean function y = a in positive logic. schmitt-trigger inputs are designed to provide a minimum separation between positive and negative switching thresholds. this allows for noisy or slow inputs that would cause problems such as oscillation or excessive current draw with normal cmos inputs. 9.2 functional block diagram figure 4. logic diagram (positive logic) 9.3 feature description the wide operating range of the device allows it to be used in a variety of systems that use different logic levels. the outputs can drive up to 10 lsttl loads each. the device has very low power consumption, with 20- a max i cc . typical propagation delay is also low at 11 ns. the balanced drive outputs can source or sink 4 ma at 5-v v cc . the input leakage current is 1 a max. 9.4 device functional modes table 1 lists the functional modes of the snx4hc14. table 1. function table (each inverter) inputs output a y h l l h copyright ? 1982 ? 2015, texas instruments incorporated submit documentation feedback 9 product folder links: sn54hc14 SN74HC14 a y
sn54hc14 , SN74HC14 scls085h ? december 1982 ? revised september 2015 www.ti.com 10 application and implementation note information in the following applications sections is not part of the ti component specification, and ti does not warrant its accuracy or completeness. ti ? s customers are responsible for determining suitability of components for their purposes. customers should validate and test their design implementation to confirm system functionality. 10.1 application information the snx4hc14 device is a schmitt-trigger input cmos device that can be used for a multitude of inverting buffer type functions. the application shown here takes advantage of the schmitt-trigger inputs to produce a delay for a logic output. 10.2 typical application figure 5. simplified application schematic 10.2.1 design requirements this device uses cmos technology. take care to avoid bus contention because it can drive currents that would exceed maximum limits. parallel output drive can create fast edges into light loads so consider routing and load conditions to prevent ringing. 10.2.2 detailed design procedure this circuit is designed around an rc network that produces a slow input to the second inverter. the rc time constant, , is calculated from: = r c the delay time for this circuit will be between 1.2 and 0.42 . it should be noted that the delay will be consistent for each device, but since the switching threshold is only guaranteed between a minimum and maximum value, the output pulse length will vary between devices. these values were calculated by using the minimum and maximum guaranteed v t+ values. the resistor value should be chosen such that the maximum current from/to the snx4hc14 is 4 ma. ? recommended input conditions: ? schmitt-trigger inputs allow for slow inputs. ? specified high and low levels. see (v ih and v il ) in recommended operating conditions . ? recommended output conditions: ? load currents should not exceed 4 ma per output. 10 submit documentation feedback copyright ? 1982 ? 2015, texas instruments incorporated product folder links: sn54hc14 SN74HC14 1a 1y c 1 r 1 2a 2y input output
sn54hc14 , SN74HC14 www.ti.com scls085h ? december 1982 ? revised september 2015 typical application (continued) 10.2.3 application curve figure 6. ideal capacitor voltage and output voltage with positive switching threshold range representation. 11 power supply recommendations the power supply can be any voltage between the minimum and maximum supply voltage rating located in the recommended operating conditions . each v cc terminal should have a good bypass capacitor to prevent power disturbance. for devices with a single supply, ti recommends a 0.1- f capacitor. if there are multiple vcc terminals, then ti recommends a 0.01- f or 0.022- f capacitor for each power terminal. multiple bypass capacitors can be paralleled to reject different frequencies of noise. frequencies of 0.1 f and 1 f are commonly used in parallel. the bypass capacitor should be installed as close as possible to the power terminal for best results. copyright ? 1982 ? 2015, texas instruments incorporated submit documentation feedback 11 product folder links: sn54hc14 SN74HC14 v c v out 4.5 2.5 t 0 + 2 t 0 t 0 + 5 2 5.0 4.0 1.5 2.0 1.0 0.5 3.5 3.0 voltage (v) time 0.0 t 0 + 2 2 t 0 + 3 2 t 0 + 4 2 v t+ v t+ typical max delay time = 1.20 2 min delay time = 0.42 2
sn54hc14 , SN74HC14 scls085h ? december 1982 ? revised september 2015 www.ti.com 12 layout 12.1 layout guidelines when using multiple bit logic devices, inputs should never float. in many cases, functions or parts of functions of digital logic devices are unused, for example, when only two inputs of a triple-input and gate are used or only three of the four buffer gates are used. such input pins should not be left unconnected because the undefined voltages at the outside connections result in undefined operational states. all unused inputs of digital logic devices must be connected to a high or low bias to prevent them from floating. the logic level that should be applied to any particular unused input depends on the function of the device. generally they will be tied to gnd or v cc whichever makes more sense or is more convenient. floating outputs is generally acceptable, unless the part is a transceiver. 12.2 layout example figure 7. layout recommendation 12 submit documentation feedback copyright ? 1982 ? 2015, texas instruments incorporated product folder links: sn54hc14 SN74HC14
sn54hc14 , SN74HC14 www.ti.com scls085h ? december 1982 ? revised september 2015 13 device and documentation support 13.1 documentation support 13.1.1 related documentation for related documentation, please see the following: implications of slow or floating cmos inputs , scba004 13.2 related links the table below lists quick access links. categories include technical documents, support and community resources, tools and software, and quick access to sample or buy. table 2. related links technical tools & support & parts product folder sample & buy documents software community sn54hc05 click here click here click here click here click here sn74hc05 click here click here click here click here click here 13.3 community resources the following links connect to ti community resources. linked contents are provided "as is" by the respective contributors. they do not constitute ti specifications and do not necessarily reflect ti's views; see ti's terms of use . ti e2e ? online community ti's engineer-to-engineer (e2e) community. created to foster collaboration among engineers. at e2e.ti.com, you can ask questions, share knowledge, explore ideas and help solve problems with fellow engineers. design support ti's design support quickly find helpful e2e forums along with design support tools and contact information for technical support. 13.4 trademarks e2e is a trademark of texas instruments. all other trademarks are the property of their respective owners. 13.5 electrostatic discharge caution these devices have limited built-in esd protection. the leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the mos gates. 13.6 glossary slyz022 ? ti glossary . this glossary lists and explains terms, acronyms, and definitions. 14 mechanical, packaging, and orderable information the following pages include mechanical, packaging, and orderable information. this information is the most current data available for the designated devices. this data is subject to change without notice and revision of this document. for browser-based versions of this data sheet, refer to the left-hand navigation. copyright ? 1982 ? 2015, texas instruments incorporated submit documentation feedback 13 product folder links: sn54hc14 SN74HC14
package option addendum www.ti.com 4-dec-2014 addendum-page 1 packaging information orderable device status (1) package type package drawing pins package qty eco plan (2) lead/ball finish (6) msl peak temp (3) op temp (c) device marking (4/5) samples 5962-8409101vca active cdip j 14 1 tbd a42 n / a for pkg type -55 to 125 5962-8409101vc a snv54hc14j 5962-8409101vda active cfp w 14 1 tbd a42 n / a for pkg type -55 to 125 5962-8409101vd a snv54hc14w 84091012a active lccc fk 20 1 tbd post-plate n / a for pkg type -55 to 125 84091012a snj54hc 14fk 8409101ca active cdip j 14 1 tbd a42 n / a for pkg type -55 to 125 8409101ca snj54hc14j 8409101da active cfp w 14 1 tbd a42 n / a for pkg type -55 to 125 8409101da snj54hc14w jm38510/65702bca active cdip j 14 1 tbd a42 n / a for pkg type -55 to 125 jm38510/ 65702bca jm38510/65702bda active cfp w 14 1 tbd a42 n / a for pkg type -55 to 125 jm38510/ 65702bda m38510/65702bca active cdip j 14 1 tbd a42 n / a for pkg type -55 to 125 jm38510/ 65702bca m38510/65702bda active cfp w 14 1 tbd a42 n / a for pkg type -55 to 125 jm38510/ 65702bda sn54hc14j active cdip j 14 1 tbd a42 n / a for pkg type -55 to 125 sn54hc14j SN74HC14d active soic d 14 50 green (rohs & no sb/br) cu nipdau level-1-260c-unlim -40 to 85 hc14 SN74HC14dbr active ssop db 14 2000 green (rohs & no sb/br) cu nipdau level-1-260c-unlim -40 to 85 hc14 SN74HC14dbrg4 active ssop db 14 2000 green (rohs & no sb/br) cu nipdau level-1-260c-unlim -40 to 85 hc14 SN74HC14de4 active soic d 14 50 green (rohs & no sb/br) cu nipdau level-1-260c-unlim -40 to 85 hc14 SN74HC14dg4 active soic d 14 50 green (rohs & no sb/br) cu nipdau level-1-260c-unlim -40 to 85 hc14 SN74HC14dr active soic d 14 2500 green (rohs & no sb/br) cu nipdau | cu sn level-1-260c-unlim -40 to 85 hc14
package option addendum www.ti.com 4-dec-2014 addendum-page 2 orderable device status (1) package type package drawing pins package qty eco plan (2) lead/ball finish (6) msl peak temp (3) op temp (c) device marking (4/5) samples SN74HC14dre4 active soic d 14 2500 green (rohs & no sb/br) cu nipdau level-1-260c-unlim -40 to 85 hc14 SN74HC14drg3 active soic d 14 2500 green (rohs & no sb/br) cu sn level-1-260c-unlim -40 to 85 hc14 SN74HC14drg4 active soic d 14 2500 green (rohs & no sb/br) cu nipdau level-1-260c-unlim -40 to 85 hc14 SN74HC14dt active soic d 14 250 green (rohs & no sb/br) cu nipdau level-1-260c-unlim -40 to 85 hc14 SN74HC14dtg4 active soic d 14 250 green (rohs & no sb/br) cu nipdau level-1-260c-unlim -40 to 85 hc14 SN74HC14n active pdip n 14 25 pb-free (rohs) cu nipdau | cu sn n / a for pkg type -40 to 85 SN74HC14n SN74HC14n3 obsolete pdip n 14 tbd call ti call ti -40 to 85 SN74HC14ne4 active pdip n 14 25 pb-free (rohs) cu nipdau n / a for pkg type -40 to 85 SN74HC14n SN74HC14nsle obsolete so ns 14 tbd call ti call ti -40 to 85 SN74HC14nsr active so ns 14 2000 green (rohs & no sb/br) cu nipdau level-1-260c-unlim -40 to 85 hc14 SN74HC14nsre4 active so ns 14 2000 green (rohs & no sb/br) cu nipdau level-1-260c-unlim -40 to 85 hc14 SN74HC14pw active tssop pw 14 90 green (rohs & no sb/br) cu nipdau level-1-260c-unlim -40 to 85 hc14 SN74HC14pwe4 active tssop pw 14 90 green (rohs & no sb/br) cu nipdau level-1-260c-unlim -40 to 85 hc14 SN74HC14pwg4 active tssop pw 14 90 green (rohs & no sb/br) cu nipdau level-1-260c-unlim -40 to 85 hc14 SN74HC14pwle obsolete tssop pw 14 tbd call ti call ti -40 to 85 SN74HC14pwr active tssop pw 14 2000 green (rohs & no sb/br) cu nipdau | cu sn level-1-260c-unlim -40 to 85 hc14 SN74HC14pwre4 active tssop pw 14 2000 green (rohs & no sb/br) cu nipdau level-1-260c-unlim -40 to 85 hc14 SN74HC14pwrg4 active tssop pw 14 2000 green (rohs & no sb/br) cu nipdau level-1-260c-unlim -40 to 85 hc14 SN74HC14pwt active tssop pw 14 250 green (rohs & no sb/br) cu nipdau level-1-260c-unlim -40 to 85 hc14
package option addendum www.ti.com 4-dec-2014 addendum-page 3 orderable device status (1) package type package drawing pins package qty eco plan (2) lead/ball finish (6) msl peak temp (3) op temp (c) device marking (4/5) samples SN74HC14pwtg4 active tssop pw 14 250 green (rohs & no sb/br) cu nipdau level-1-260c-unlim -40 to 85 hc14 snj54hc14fk active lccc fk 20 1 tbd post-plate n / a for pkg type -55 to 125 84091012a snj54hc 14fk snj54hc14j active cdip j 14 1 tbd a42 n / a for pkg type -55 to 125 8409101ca snj54hc14j snj54hc14w active cfp w 14 1 tbd a42 n / a for pkg type -55 to 125 8409101da snj54hc14w (1) the marketing status values are defined as follows: active: product device recommended for new designs. lifebuy: ti has announced that the device will be discontinued, and a lifetime-buy period is in effect. nrnd: not recommended for new designs. device is in production to support existing customers, but ti does not recommend using this part in a new design. preview: device has been announced but is not in production. samples may or may not be available. obsolete: ti has discontinued the production of the device. (2) eco plan - the planned eco-friendly classification: pb-free (rohs), pb-free (rohs exempt), or green (rohs & no sb/br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. tbd: the pb-free/green conversion plan has not been defined. pb-free (rohs): ti's terms "lead-free" or "pb-free" mean semiconductor products that are compatible with the current rohs requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. where designed to be soldered at high temperatures, ti pb-free products are suitable for use in specified lead-free processes. pb-free (rohs exempt): this component has a rohs exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. the component is otherwise considered pb-free (rohs compatible) as defined above. green (rohs & no sb/br): ti defines "green" to mean pb-free (rohs compatible), and free of bromine (br) and antimony (sb) based flame retardants (br or sb do not exceed 0.1% by weight in homogeneous material) (3) msl, peak temp. - the moisture sensitivity level rating according to the jedec industry standard classifications, and peak solder temperature. (4) there may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device. (5) multiple device markings will be inside parentheses. only one device marking contained in parentheses and separated by a "~" will appear on a device. if a line is indented then it is a continuation of the previous line and the two combined represent the entire device marking for that device. (6) lead/ball finish - orderable devices may have multiple material finish options. finish options are separated by a vertical ruled line. lead/ball finish values may wrap to two lines if the finish value exceeds the maximum column width.
package option addendum www.ti.com 4-dec-2014 addendum-page 4 important information and disclaimer: the information provided on this page represents ti's knowledge and belief as of the date that it is provided. ti bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. efforts are underway to better integrate information from third parties. ti has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. ti and ti suppliers consider certain information to be proprietary, and thus cas numbers and other limited information may not be available for release. in no event shall ti's liability arising out of such information exceed the total purchase price of the ti part(s) at issue in this document sold by ti to customer on an annual basis. other qualified versions of sn54hc14, sn54hc14-sp, SN74HC14 : ? catalog: SN74HC14 , sn54hc14 ? automotive: SN74HC14-q1 , SN74HC14-q1 ? military: sn54hc14 ? space: sn54hc14-sp note: qualified version definitions: ? catalog - ti's standard catalog product ? automotive - q100 devices qualified for high-reliability automotive applications targeting zero defects ? military - qml certified for military and defense applications ? space - radiation tolerant, ceramic packaging and qualified for use in space-based application
tape and reel information *all dimensions are nominal device package type package drawing pins spq reel diameter (mm) reel width w1 (mm) a0 (mm) b0 (mm) k0 (mm) p1 (mm) w (mm) pin1 quadrant SN74HC14dbr ssop db 14 2000 330.0 16.4 8.2 6.6 2.5 12.0 16.0 q1 SN74HC14dr soic d 14 2500 330.0 16.4 6.5 9.0 2.1 8.0 16.0 q1 SN74HC14dr soic d 14 2500 330.0 16.8 6.5 9.5 2.3 8.0 16.0 q1 SN74HC14dr soic d 14 2500 330.0 16.4 6.5 9.0 2.1 8.0 16.0 q1 SN74HC14drg3 soic d 14 2500 330.0 16.8 6.5 9.5 2.3 8.0 16.0 q1 SN74HC14drg4 soic d 14 2500 330.0 16.4 6.5 9.0 2.1 8.0 16.0 q1 SN74HC14dt soic d 14 250 330.0 16.4 6.5 9.0 2.1 8.0 16.0 q1 SN74HC14pwr tssop pw 14 2000 330.0 12.4 6.9 5.6 1.6 8.0 12.0 q1 SN74HC14pwt tssop pw 14 250 330.0 12.4 6.9 5.6 1.6 8.0 12.0 q1 package materials information www.ti.com 6-dec-2014 pack materials-page 1
*all dimensions are nominal device package type package drawing pins spq length (mm) width (mm) height (mm) SN74HC14dbr ssop db 14 2000 367.0 367.0 38.0 SN74HC14dr soic d 14 2500 333.2 345.9 28.6 SN74HC14dr soic d 14 2500 364.0 364.0 27.0 SN74HC14dr soic d 14 2500 367.0 367.0 38.0 SN74HC14drg3 soic d 14 2500 364.0 364.0 27.0 SN74HC14drg4 soic d 14 2500 333.2 345.9 28.6 SN74HC14dt soic d 14 250 367.0 367.0 38.0 SN74HC14pwr tssop pw 14 2000 367.0 367.0 35.0 SN74HC14pwt tssop pw 14 250 367.0 367.0 35.0 package materials information www.ti.com 6-dec-2014 pack materials-page 2

mechanical data msso002e ? january 1995 ? revised december 2001 post office box 655303 ? dallas, texas 75265 db (r-pdso-g**) plastic small-outline 4040065 /e 12/01 28 pins shown gage plane 8,20 7,40 0,55 0,95 0,25 38 12,90 12,30 28 10,50 24 8,50 seating plane 9,90 7,90 30 10,50 9,90 0,38 5,60 5,00 15 0,22 14 a 28 1 20 16 6,50 6,50 14 0,05 min 5,90 5,90 dim a max a min pins ** 2,00 max 6,90 7,50 0,65 m 0,15 0 ? 8 0,10 0,09 0,25 notes: a. all linear dimensions are in millimeters. b. this drawing is subject to change without notice. c. body dimensions do not include mold flash or protrusion not to exceed 0,15. d. falls within jedec mo-150
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